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用Verilog为Altera DE1 SoC FPGA板创建的数字音频均衡器

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发表于 2023-7-28 03:37:00 | 显示全部楼层 |阅读模式
文件列表:
Altera_UP_Audio_Bit_Counter.v
Altera_UP_Audio_In_Deserializer.v
Altera_UP_Audio_Out_Serializer.v
Altera_UP_Clock_Edge.v
Altera_UP_SYNC_FIFO.v
Audio_Clock.v
Audio_Controller.v
BandFIR5503000.v
Frequency-Analysis.jpg
HighFIR.v
I2C_Controller.v
IMG_0266.jpg
LowFIR500.v
ProjectFIR2.v
README.md
avconf.v
vga_adapter.v
vga_address_translator.v
vga_controller.v
vga_pll.v



用Verilog为Altera DE1 SoC FPGA板创建的数字音频均衡器.zip (2.2 MB, 下载次数: 0, 售价: 10 积分)

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